5G/NR - MiniSlot
You may heard of MiniSlot in various 5G/NR related white papers and presentations even before 5G/NR 3GPP technical specification roll out. However, I still don't find any formal term 'MiniSlot' in 3GPP TS spec as of now (Jan 2019). It implies that 'MiniSlot' would not be the formal term even if it is possible to implement it.
Based on the white papers and presentations that I saw (Ref  for example), they define 'MiniSlot' as a slot that carries PDSCH or PUSCH with only a few symbol length(e.g, 2 symbols, 4 symbols etc) as illustrated below.
How to implement MiniSlot ?
As of now(Jan 2019), I don't see any explicit description on MiniSlot implemenations in 3GPP spec. Probably we may see some when eMTC or URLLC related specification is fully specified even if they would not use the term 'MiniSlot'.
I think we can think of roughly two different ways to implement mini-slot as described below. But as of now (Mar 2020), I haven't found any explicit description on how to implement mini-slot in 3GPP (I might have missed the spec, it will be appreciated if any readers let me know if they managed to find the specification). ==> Recently (Mar 2021) one of the reader kindly let me know that there is some descriptions on the minislot in TR 38.912-8.1. I realized that this description was there since Rel 15 but I just didn't know about it.
Case 1 : Using Regular scheduling (i.e, using DCI 1_x, DCI 0_x and SLIV)
Transmit a DCI that schedule PDSCH with 2 or 4 symbols (using SLIV). In most of white papers, they show that DCI(PDSCH) symbol is directly followed by PDSCH. Also most of white paper illustrates that the DCI and PDSCH is located in the same slot (i.e, K0 = 0). But I think it is possible to schedule PDSCH in such way that DCI and PDSCH is not in the same slot(i.e, K0 is not Zero).
One of the extrem case of using Minislot (I think this would be the biggest motivation for minislot) is to achieve 'self-contained slot' which carrys PDCCH(DL Scheduling), PDSCH(DL data),PUCCH(HARQ ACK/NACK) within the same slot and it will greatly reduce physical layer latency.
Like DL Minislot (PDSCH MiniSlot), we can transmit UL minislot(PUSCH minislot) in similar way as shown below.
Transmit a DCI that schedule PUSCH with 2 or 4 symbols (using SLIV). In most of white papers, they show that DCI(PUSCH) symbol is directly followed by PUSCH, but in practice it is likely to put one or more symbol gaps between DCI and PUSCH because switching between DL(DCI/PDCCH) and UL(PUSCH) without any guard period would be very challenging.
Also most of white paper illustrates that the DCI and PUSCH is located in the same slot (i.e, K2 = 0). But I think it is possible to schedule PDSCH in such way that DCI and PUSCH is not in the same slot(i.e, K2 is not Zero).
Another way I can think of is to pick a short symbol slots from SlotformatCombination (e.g, Slotformat 9, 17 etc) and schedule the slot using DCI 2_0.
Length of Minislot
How short the minislot can be ? The length of minislot is described in TR 38.912 as follows.
Why Minislot ?
Why we need a special slot called mini-slot ? That is, what is the motivation for the mini-slot ? The motivation (use-case) for the mini-slot is described in TR 38.912-8.1 as follows.
Design Consideration for Minislot
The base line consideration for the designing mini-slot is also described in TR 38.912 as follows. To me, it sound as if mini-slot is just a form of regular slot. That is, it is just a regular slot with very short symbol lengh. For all other aspect (e.g, DMRS, HARQ, DL control, UCI feedback etc) there is no difference between minislot and regular slot.
 3GPP TR 38.912 5G;Study on New Radio (NR) access technology - 8.1 Numerologies and frame structure