Electronics

Flipflop - JK

If you want to understand the overal behavior any flipflop, you only need to know the decision rule of the device and exactly when the flipflop make decision as specified in the rule (Understanding the exact internal mechanism of a flipflop may not be that easy since in many cases a flipflop is made up of many logic gates combined in a complicated circuit, but in most cases you don't need to understand the detailed internal circuit. You only have to understand overall behavior of it).  When we explain the behavior of a digital circuit, we usually use 'Truth Table', but in case of flipflop there are many cases where it is hard to describe the behavior in truth table. Especially when the flip flop makes the decision based on rising or falling edge of the input clock. You would see some people describe even this kind of behavior using truth table, but to me it was not that easy to understand the truth table of this kind of flipflop. In this case, I prefer to describe the behavior in a kind of descriptive rule (like software algorithm) rather than a truth table. JK-flipflop is also making the decision for the output based on clock (at rising edged of the clock). So I would describe the behavir in descriptive rule as follows. (Actually I would put down the truth table as well for your reference and you can take whatever is easier and clearer for you)

Rule : 

i) Whenever the clock is in 'Rising edge', it does as follows

a) if J = 0 and K = 1, it puts out 0 on Q. (Q bar is automatically set opposite of Q)

b) if J = 1 and K = 0, it puts out 1 on Q. (Q bar is automatically set opposite of Q)

c) if J = 0 and K = 0, it maintain whatever the existing value of Q. (Q bar is automatically set opposite of Q)

c) if J = 1 and K = 1, it puts out whatever the opposite value of existing value of Q. (Q bar is automatically set opposite of Q)

ii) When Clock is not in rising edge, the Q value maintain whatever the existing value. D value during this period does not influence on Q value. Q bar is automatically set to be opposite states of Q)

If I represent this rule in a tabular format, you would be as follows.

One example of JK-Flipflop operation is illustrated blow. Note that the changes in D when Clock is not in Rising Edge does not influence on the output of the flipflop. It means if there is some noise applied during 'non-rising edge' period, the noise would automatically filtered out by this operation.