5G/NR - FRC         

 

 

 

FRC

 

FRC stands for Fixed Reference Channel. In RF conformance test, FRC gives a fixed and repeatable downlink channel configuration so that everybody can test UE receiver behavior under the same condition. The detailed parameters are scattered across several tables in 38.521-1, so I put them together here for easy referencing. There is nothing that I added myself; the purpose of this note is just to make the tables easier to find and compare.

Coreset / PDSCH Mapping Type / TRS

This section shows the common downlink channel configuration used by the FRC tables. It covers the CORESET size and time location, PDSCH mapping type, DMRS related assumptions and TRS/CSI-RS related parameters. These are the baseline parameters that are usually reused by the detailed FRC scheduling tables shown in the next section.

 

< 38.521-1 v19.4.0 - Table A.3.1-1: Common reference channel parameters >

Parameter

Unit

Value

CORESET frequency domain allocation

 

Full BW

CORESET time domain allocation

 

2 OFDM symbols at the begin of each slot

PDSCH mapping type

 

Type A

PDSCH start symbol index (S)

 

2

Number of consecutive PDSCH symbols (L)

 

12

PDSCH PRB bundling

PRBs

2

Dynamic PRB bundling

 

false

 

 

 

Overhead value for TBS determination

 

0

First DMRS position for Type A PDSCH mapping

 

2

DMRS type

 

Type 1

Number of additional DMRS

 

2

FDM between DMRS and PDSCH

 

Disable

CSI-RS for tracking

First subcarrier index in the PRB used for CSI-RS (k0)

0 for CSI-RS resource 1,2,3,4

 

OFDM symbols in the PRB used for CSI-RS

l0 = 6 for CSI-RS resource 1 and 3
l0 = 10 for CSI-RS resource 2 and 4

 

Number of CSI-RS ports

1 for CSI-RS resource 1,2,3,4

 

CDM Type

'No CDM' for CSI-RS resource 1,2,3,4

 

Density (p)

3 for CSI-RS resource 1,2,3,4

 

CSI-RS periodicity

15 kHz SCS: 20 for CSI-RS resource 1,2,3,4
30 kHz SCS: 40 for CSI-RS resource 1,2,3,4
60 kHz SCS: 80 for CSI-RS resource 1,2,3,4

 

CSI-RS offset

15 kHz SCS:
0 for CSI-RS resource 1 and 2
1 for CSI-RS resource 3 and 4

30 kHz SCS:
1 for CSI-RS resource 1 and 2
2 for CSI-RS resource 3 and 4

60 kHz SCS:
2 for CSI-RS resource 1 and 2
3 for CSI-RS resource 3 and 4

 

Frequency Occupation

Start PRB 0
Number of PRB = BWP size

 

QCL info

TCI state #0

PTRS configuration

 

PTRS is not configured

 

< 38.521-1 v19.4.0 - Table A.3.2.1-1: Additional reference channels parameters for FDD >

Parameter

Unit

Value

Number of HARQ Processes

 

4

K1 value

 

2 for all slots

PDSCH Scheduling

This section is the main part of FRC definition. It lists the fixed PDSCH scheduling patterns for receiver requirements and maximum input level tests. The tables are grouped by duplex mode, subcarrier spacing and modulation order, and they specify items like allocated RBs, MCS/TBS related values, number of layers, RV sequence, slot location and HARQ process behavior. In a real test script, these tables are the reference for constructing the downlink traffic pattern.

 

< 38.521-1 v19.4.0 - Table A.3.2.2-1: Fixed reference channel for receiver requirements (SCS 15 kHz, FDD, QPSK 1/3) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

3

5, 10, 15, 20 (Note 5)

10

15

20

25

30

40

 

 

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

 

 

Subcarrier spacing configuration μ

 

0

0

0

0

0

0

0

0

 

 

Allocated resource blocks

 

15

25

52

79

106

133

160

216

 

 

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

 

 

Allocated slots per Frame

 

8

8

8

8

8

8

8

8

 

 

MCS Index

 

4

4

4

4

4

4

4

4

 

 

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

Modulation

 

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

 

Target Coding Rate

 

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

 

 

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

 

 

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

 

 

For Slots 2,3,4,5,6,7,8,9

Bits

984

1672

3368

5120

6912

8712

10504

14088

1

 

Transport block CRC

Bits

16

16

16

24

24

24

24

24

 

 

LDPC base graph

 

2

2

2

1

1

1

1

1

 

 

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

 

 

For Slots 2,3,4,5,6,7,8,9

CBs

1

1

1

1

1

2

2

2

 

 

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

 

 

For Slots 2,3,4,5,6,7,8,9

Bits

3240

5400

11232

17064

22896

28728

34560

46656

5

 

Max. Throughput averaged over 1 frame

Mbps

0.787

1.338

2.694

4.096

5.530

6.970

8.403

11.270

1

 

 

< 38.521-1 v19.4.0 -Table A.3.2.2-2: Fixed reference channel for receiver requirements (SCS 30 kHz, FDD, QPSK 1/3) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10

10, 15, 20 (Note 5)

15

20

25

30

40

50

60

80

90

100

Subcarrier spacing configuration μ

 

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

 

24

12

38

51

65

78

106

133

162

217

245

273

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

17

17

17

17

17

17

17

17

17

17

17

17

MCS Index

 

4

4

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

 

 

Modulation

 

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

 

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

Bits

1608

808

2472

3368

4224

4992

6912

8712

10504

14088

15880

17928

Transport block CRC

Bits

16

16

16

16

24

24

24

24

24

24

24

24

LDPC base graph

 

2

2

2

2

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

CBs

1

1

1

1

1

1

1

2

2

2

2

3

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

Bits

5184

2592

8208

11016

14040

16848

22896

28728

34992

46872

52920

58968

Max. Throughput averaged over 1 frame

Mbps

2.734

1.374

4.202

5.726

7.181

8.486

11.750

14.810

17.857

23.950

26.996

30.478

 

< 38.521-1 v19.4.0 -Table A.3.2.2-3: Fixed reference channel for receiver requirements (SCS 60 kHz, FDD, QPSK 1/3) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

 

 

10

15

20

25

30

40

50

60

80

90

100

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

90

100

Subcarrier spacing configuration μ

 

2

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

 

11

18

24

31

38

51

65

79

107

121

135

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

36

36

36

36

36

36

36

36

36

36

36

MCS Index

 

4

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS Determination

 

64QAM

 

 

 

 

 

 

 

 

 

 

Modulation

 

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

 

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,...,39

Bits

736

1192

1608

2024

2472

3368

4224

5120

6912

7808

8712

Transport block CRC

Bits

16

16

16

16

16

16

24

24

24

24

24

LDPC base graph

 

2

2

2

2

2

2

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,...,39

CBs

1

1

1

1

1

1

1

1

1

1

2

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,...,39

Bits

2376

3888

5184

6696

8208

11016

14040

17064

23112

26136

29160

Max. Throughput averaged over 1 frame

Mbps

2.650

4.291

5.789

7.286

8.899

12.125

15.206

18.432

24.883

28.109

31.363

Notes

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame.

NOTE 4: Slot i is slot index per frame.

 

< 38.521-1 v19.4.0 -Table A.3.2.3-1: Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz, FDD, 64QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

3

5, 10, 15, 20 (Note 5)

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

15

15

Subcarrier spacing configuration μ

 

0

0

0

0

0

0

0

0

0

0

Allocated resource blocks

 

15

20

25

52

79

106

133

160

216

270

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

8

8

8

8

8

8

8

8

8

8

MCS Index

 

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

Modulation

 

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

 

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

7296

9736

12296

25608

38936

52224

64552

77896

106576

131176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slot 0,1

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

CBs

1

2

2

4

5

7

8

10

13

16

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slot 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

9720

12960

16200

33696

51192

68688

86184

103680

139968

174960

Max. Throughput averaged over 1 frame

Mbps

5.837

7.789

9.837

20.486

31.149

41.779

51.642

62.317

85.261

104.941

 

< 38.521-1 v19.4.0 - Table A.3.2.3-2: Fixed reference channel for maximum input level receiver requirements (SCS 30 kHz, FDD, 64QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10, 15, 20 (Note 5)

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration μ

 

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

 

10

24

38

51

65

78

106

133

162

217

273

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

17

17

17

17

17

17

17

17

17

17

17

MCS Index

 

24

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

 

Modulation

 

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

 

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

Bits

4864

11784

18432

25104

31752

37896

52224

64552

79896

106576

135296

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slot2 0,1,2

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

CBs

1

2

3

3

4

5

7

8

10

13

17

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

Bits

6480

15552

24624

33048

42120

50544

68688

86184

104976

140616

176904

Max. Throughput averaged over 1 frame

Mbps

8.269

20.033

31.334

42.677

53.978

64.423

88.781

109.738

135.823

181.179

230.003

Notes

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot 0 of each frame

NOTE 4: Slot i is slot index per frame

NOTE 5: Channel bandwidths in this column only apply to UEs supporting IE supportOfERedCap-r18 .

 

< 38.521-1 v19.4.0 - Table A.3.2.3-3: Fixed Reference Channel for Maximum input level receiver requirements (SCS 60 kHz, FDD, 64QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration μ

 

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

 

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

36

36

36

36

36

36

36

36

36

36

MCS Index

 

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

Modulation

 

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

 

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,....,39

Bits

5376

8712

11784

15112

18432

25104

31752

38936

52224

65576

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,....,39

CBs

1

2

2

2

3

3

4

5

7

8

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,....,39

Bits

7128

11664

15552

20088

24624

33048

42120

51192

69336

87480

Max. Throughput averaged over 1 frame

Mbps

19.354

31.363

42.422

54.403

66.355

90.374

114.307

140.170

188.006

236.074

Notes

Note 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

Note 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Note 3: SS/PBCH block is transmitted in slot #0 of each frame.

Note 4: Slot i is slot index per frame.

 

< 38.521-1 v19.4.0 - Table A.3.2.4-1: Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz,FDD, 256QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

3, 5, 10, 15, 20 (NOTE 5)

5

10

15

20

25

30

40

50

Channel bandwidth

MHz

 

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

15

Subcarrier spacing configuration μ

 

0

0

0

0

0

0

0

0

0

Allocated resource blocks

 

15

25

52

79

106

133

160

216

270

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

8

8

8

8

8

8

8

8

8

MCS Index

 

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

 

256QAM

 

 

 

 

 

 

 

 

Modulation

 

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

 

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

9992

16896

34816

53288

71688

90176

108552

143400

180376

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

CBs

2

3

5

7

9

12

14

18

22

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,3,4,5,6,7,8,9

Bits

12960

21600

44928

68256

91584

114912

138240

186624

233280

Max. Throughput averaged over 1 frame

Mbps

7.994

13.517

27.853

42.630

57.350

72.141

86.842

114.720

144.310

Notes

Note 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

Note 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Note 3: SS/PBCH block is transmitted in slot 0 of each frame.

Note 4: Slot i is slot index per frame.

Note 5: Channel bandwidths 5, 10, 15, and 20 MHz in this column only apply to UEs supporting IE supportOfERedCap-r18 .

 

< 38.521-1 v19.4.0 - Table A.3.2.4-2: Fixed reference channel for maximum input level receiver requirements (SCS 30 kHz, FDD, 256QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10,15, 20 (NOTE 5)

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration μ

 

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

 

7

24

38

51

65

78

106

133

162

217

273

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

17

17

17

17

17

17

17

17

17

17

17

MCS Index

 

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

 

256QAM

 

 

 

 

 

 

 

 

 

 

Modulation

 

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

 

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

Bits

4736

16136

25608

33816

44040

52224

71688

90176

108552

147576

184424

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

CBs

1

2

4

5

6

7

9

11

13

18

22

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 3,...,19

Bits

6048

20736

32832

44064

56160

67392

91584

114912

139968

187488

235872

Max. Throughput averaged over 1 frame

Mbps

8.051

27.431

43.534

57.487

74.868

88.781

121.870

153.299

184.538

250.879

313.521

 

< 38.521-1 v19.4.0 - Table A.3.2.4-3: Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, FDD, 256QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration μ

 

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

 

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

36

36

36

36

36

36

36

36

36

36

MCS Index

 

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

 

256QAM

 

 

 

 

 

 

 

 

 

Modulation

 

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

 

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,...,39

Bits

7424

12040

16136

21000

25608

33816

44040

53288

71688

90176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,...,39

CBs

1

2

3

3

4

5

6

7

9

12

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 4,...,39

Bits

9504

15552

20736

26784

32832

44064

56160

68256

92448

116640

Max. Throughput averaged over 1 frame

Mbps

26.726

43.344

58.090

75.600

92.189

121.738

158.544

191.837

258.077

324.634

Notes

Note 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.2.1-1.

Note 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Note 3: SS/PBCH block is transmitted in slot #0 of each frame.

Note 4: Slot i is slot index per frame.

 

< 38.521-1 v19.4.0 - Table A.3.3.2-1: Fixed reference channel for receiver requirements (SCS 15 kHz, TDD, QPSK 1/3) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

5, 10, 15, 20 (Note 5)

10

15

20

25

30

40

50

Channel bandwidth

MHz

 

 

 

 

 

 

 

 

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

Subcarrier spacing configuration μ

 

0

0

0

0

0

0

0

0

Allocated resource blocks

 

25

52

79

106

133

160

216

270

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

4

4

4

4

4

4

4

4

MCS Index

 

4

4

4

4

4

4

4

4

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

Modulation

 

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

 

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

1672

3368

5120

6912

8712

10504

14088

17424

Transport block CRC

Bits

16

16

24

24

24

24

24

24

LDPC base graph

 

2

2

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

CBs

1

1

1

1

2

2

2

3

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

5400

11232

17064

22896

28728

34560

46656

58320

Max. Throughput averaged over 1 frame

Mbps

0.669

1.347

2.048

2.765

3.485

4.202

5.635

6.970

Notes

Note 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

Note 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Note 3: SS/PBCH block is transmitted in slot 0 of each frame.

Note 4: Slot i is slot index per frame.

Note 5: Channel bandwidths 10, 15, and 20 MHz in this column only apply to UEs supporting IE supportOfERedCap-r18 but not eRedCapNotReducedBB-BW-r18 .

 

< 38.521-1 v19.4.0 - Table A.3.3.2-2: Fixed reference channel for receiver requirements (SCS 30 kHz, TDD, QPSK 1/3) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10, 15, 20 (Note 5)

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration μ

 

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

 

12

24

38

51

65

78

106

133

162

162

217

273

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

11

11

11

11

11

11

11

11

11

13

11

11

MCS Index

 

4

4

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

 

 

Modulation

 

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

 

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

Bits

808

1608

2472

3368

4224

4992

6912

8712

10504

12296

14088

17928

Transport block CRC

Bits

16

16

16

16

24

24

24

24

24

24

24

24

LDPC base graph

 

2

2

2

2

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

CBs

1

1

1

1

1

1

1

2

2

2

2

3

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

Bits

2592

5184

8208

11016

14040

16848

22896

28728

34992

40824

46872

58968

Max. Throughput averaged over 1 frame

Mbps

0.889

1.7699

2.719

3.705

4.646

5.491

7.603

9.583

11.554

13.526

15.497

19.721

 

< 38.521-1 v19.4.0 - Table A.3.3.2-3: Fixed reference channel for receiver requirements (SCS 60 kHz, TDD, QPSK 1/3) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration μ

 

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

 

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

24

24

24

24

24

24

24

24

24

24

MCS Index

 

4

4

4

4

4

4

4

4

4

4

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

Modulation

 

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

QPSK

Target Coding Rate

 

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

1/3

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,...,13} for i from {4,...,39}

Bits

736

1192

1608

2024

2472

3368

4224

5120

6912

8712

Transport block CRC

Bits

16

16

16

16

16

16

24

24

24

24

LDPC base graph

 

2

2

2

2

2

2

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,...,13} for i from {4,...,39}

CBs

1

1

1

1

1

1

1

1

1

2

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,...,13} for i from {4,...,39}

Bits

2376

3888

5184

6696

8208

11016

14040

17064

23112

29160

Max. Throughput averaged over 1 frame

Mbps

1.766

3.2.861

3.859

4.858

5.933

8.083

10.138

12.288

16.589

20.909

Notes

Note 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

Note 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Note 3: SS/PBCH block is transmitted in slot #0 of each frame.

Note 4: Slot i is slot index per frame.

 

< 38.521-1 v19.4.0 - Table A.3.3.3-1: Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz,TDD, 64QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

5, 10, 15, 20 (Note 5)

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

15

Subcarrier spacing configuration μ

 

0

0

0

0

0

0

0

0

0

Allocated resource blocks

 

20

25

52

79

106

133

160

216

270

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

4

4

4

4

4

4

4

4

4

MCS Index

 

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

Modulation

 

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

 

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

9736

12296

25608

38936

52224

64552

77896

106576

131176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

CBs

2

2

4

5

7

8

10

13

16

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

12960

16200

33696

51192

68688

86184

103680

139968

174960

Max. Throughput averaged over 1 frame

Mbps

3.894

4.918

10.243

15.574

20.890

20.890

31.158

42.630

52.470

 

< 38.521-1 v19.4.0 - Table A.3.3.3-2: Fixed reference channel for maximum input level receiver requirements (SCS 30 kHz, TDD, 64QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10, 15, 20
(Note 5)

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration μ

 

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

 

10

24

38

51

65

78

106

133

162

189

217

273

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

11

11

11

11

11

11

11

11

11

13

11

11

MCS Index

 

24

24

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

 

 

Modulation

 

4864

64
QAM

64
QAM

64
QAM

64
QAM

64
QAM

64
QAM

64
QAM

64
QAM

64
QAM

64
QAM

64
QAM

Target Coding Rate

 

24

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

Bits

1

11784

18432

25104

31752

37896

52224

64552

79896

92200

106576

135296

Transport block CRC

Bits

 

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

N/A

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

CBs

6480

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

CBs

5.350

2

3

3

4

5

7

8

10

11

13

17

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

Bits

24

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

Bits

1

15552

24624

33048

42120

50544

68688

86184

104976

122472

140616

176904

Max. Throughput averaged over 1 frame

Mbps

N/A

12.962

20.275

27.614

34.927

41.686

57.446

71.007

87.886

101.42

117.234

148.826

 

< 38.521-1 v19.4.0 - Table A.3.3.3-3: Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, TDD, 64QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration μ

 

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

 

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

24

24

24

24

24

24

24

24

24

24

MCS Index

 

24

24

24

24

24

24

24

24

24

24

MCS Table for TBS determination

 

64QAM

 

 

 

 

 

 

 

 

 

Modulation

 

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

64 QAM

Target Coding Rate

 

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

3/4

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 5) = {0,...,13} for i from {4,...,39}

Bits

5376

8712

11784

15112

18432

25104

31752

38936

52224

65576

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 5) = {0,...,13} for i from {4,...,39}

CBs

1

2

2

2

3

3

4

5

7

8

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,...,13} for i from {4,...,39}

Bits

7128

11664

15552

20088

24624

33048

42120

51192

69336

87480

Max. Throughput averaged over 1 frame

Mbps

12.902

20.909

28.282

36.269

44.237

60.250

76.205

93.446

125.33
8

157.38
2

Notes

Note 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

Note 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit)

Note 3: SS/PBCH block is transmitted in slot #0 of each frame.

Note 4: Slot i is slot index per frame.

 

< 38.521-1 v19.4.0 - Table A.3.3.4-1: Fixed reference channel for maximum input level receiver requirements (SCS 15 kHz,TDD, 256QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

5, 10, 15, 20
(NOTE 5)

5

10

15

20

25

30

40

50

Subcarrier spacing

kHz

15

15

15

15

15

15

15

15

15

Subcarrier spacing configuration μ

 

0

0

0

0

0

0

0

0

0

Allocated resource blocks

 

15

25

52

79

106

133

160

216

270

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

4

4

4

4

4

4

4

4

4

MCS Index

 

23

23

23

23

23

23

23

23

23

MCS table for TBS determination

 

256QAM

 

 

 

 

 

 

 

 

Modulation

 

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

 

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

9992

16896

34816

53288

71688

90176

108552

143400

180376

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

CBs

2

3

5

7

9

12

14

18

23

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,3,4,8,9

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slots 2,5,6,7

Bits

12960

21600

44928

68256

91584

114912

138240

186624

233280

Max. Throughput averaged over 1 frame

Mbps

3.997

6.758

13.926

21.315

28.675

36.070

43.421

57.360

72.150

 

< 38.521-1 v19.4.0 - Table A.3.3.4-2: Fixed Reference channel for maximum input level receiver requirements (SCS 30 kHz, TDD, 256QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10, 15, 20
(NOTE 5)

10

15

20

25

30

40

50

60

70

80

100

Subcarrier spacing configuration μ

 

1

1

1

1

1

1

1

1

1

1

1

1

Allocated resource blocks

 

7

24

38

51

65

78

106

133

162

189

217

273

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

11

11

11

11

11

11

11

11

11

13

11

11

MCS Index

 

23

23

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

 

256QAM

 

 

 

 

 

 

 

 

 

 

 

Modulation

 

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

 

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

Bits

4736

16136

25608

33816

44040

52224

71688

90176

108552

127080

147576

184424

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

CBs

1

1

1

1

1

1

1

2

2

2

2

3

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2 and Slot i, if mod(i, 10) = {7,8,9} for i from {0,...,19}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 10) = {0,1,2,3,4,5,6} for i from {3,...,19}

Bits

6048

20736

32832

44064

56160

67392

91584

114912

139968

163296

187488

235872

Max. Throughput averaged over 1 frame

Mbps

5.210

17.750

28.169

37.198

48.444

57.446

78.857

99.194

119.407

139.788

162.334

202.866

Notes

NOTE 1: Additional parameters are specified in Table A.3.1-1 and Table A.3.3.1-1.

NOTE 2: If more than one Code Block is present, an additional CRC sequence of L = 24 Bits is attached to each Code Block (otherwise L = 0 Bit).

NOTE 3: SS/PBCH block is transmitted in slot #0 of each frame

NOTE 4: Slot i is slot index per frame

NOTE 5: Channel bandwidths in this column only apply to UEs supporting IE supportOfERedCap-r18 .

 

< 38.521-1 v19.4.0 - Table A.3.3.4-3: Fixed reference channel for maximum input level receiver requirements (SCS 60 kHz, TDD, 256QAM) >

Parameter

Unit

Value

 

 

 

 

 

 

 

 

 

Channel bandwidth

MHz

10

15

20

25

30

40

50

60

80

100

Subcarrier spacing configuration μ

 

2

2

2

2

2

2

2

2

2

2

Allocated resource blocks

 

11

18

24

31

38

51

65

79

107

135

Subcarriers per resource block

 

12

12

12

12

12

12

12

12

12

12

Allocated slots per Frame

 

24

24

24

24

24

24

24

24

24

24

MCS Index

 

23

23

23

23

23

23

23

23

23

23

MCS Table for TBS determination

 

256QAM

 

 

 

 

 

 

 

 

 

Modulation

 

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

256 QAM

Target Coding Rate

 

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

4/5

Maximum number of HARQ transmissions

 

1

1

1

1

1

1

1

1

1

1

Information Bit Payload per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0,...,13} for i from {4,...,39}

Bits

7424

12040

16136

21000

25608

33816

44040

53288

71688

90176

Transport block CRC

Bits

24

24

24

24

24

24

24

24

24

24

LDPC base graph

 

1

1

1

1

1

1

1

1

1

1

Number of Code Blocks per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

CBs

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 5) = {0, ...,13} for i from {4,...,39}

CBs

1

2

3

3

4

5

6

7

9

12

Binary Channel Bits per Slot

 

 

 

 

 

 

 

 

 

 

 

For Slots 0,1,2,3 and Slot i, if mod(i, 20) = {14, 15, 16, 17, 18, 19} for i from {0,...,39}

Bits

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

For Slot i, if mod(i, 20) = {0, ...,13} for i from {4,...,39}

Bits

9504

15552

20736

26784

32832

44064

56160

68256

92448

116640

Max. Throughput averaged over 1 frame

Mbps

17.818

28.896

38.726

50.400

61.459

81.158

105.696

127.891

172.051

216.422

TDD UL/DL Config

This section shows the extra parameters that are needed when the FRC is used in TDD. In TDD, the same PDSCH scheduling information is not enough by itself because the slot direction pattern decides where DL, UL and special slots can occur. This table gives the common TDD UL/DL pattern and the HARQ-ACK timing assumption used together with the TDD FRC tables.

 

< 38.521-1 v19.4.0 - Table A.3.3.1-1: Additional reference channels parameters for TDD >

Parameter

Value

 

 

 

SCS 15 kHz ( μ=0 )

SCS 30 kHz ( μ=1 )

SCS 60 kHz ( μ=2 )

TDD Slot Configuration pattern (Note 1)

DDDSU

7DS2U

14DS 1 S 2 4U

Special Slot Configuration (Note 2)

10D+2G+2U

6D+4G+4U

S 1 =12D+2G, S 2 =6G+8U

referenceSubcarrierSpacing

15 kHz

30 kHz

60 kHz

UL-DL configuration

dl-UL-TransmissionPeriodicity

5 ms

5 ms

 

nrofDownlinkSlots

3

7

 

nrofDownlinkSymbols

10

6

 

nrofUplinkSlot

1

2

 

nrofUplinkSymbols

2

4

Number of HARQ Processes

8

8

16

The number of slots between PDSCH and corresponding HARQ-ACK information (Note 3)

K1 = 4 if \text{mod}(i,5) = 0
K1 = 3 if \text{mod}(i,5) = 1
K1 = 2 if \text{mod}(i,5) = 2
where i is slot index per frame; i = \{0, \dots, 9\}

K1 = 8 if \text{mod}(i,10) = 0
K1 = 7 if \text{mod}(i,10) = 1
K1 = 6 if \text{mod}(i,10) = 2
K1 = 5 if \text{mod}(i,10) = 3
K1 = 4 if \text{mod}(i,10) = 4
K1 = 3 if \text{mod}(i,10) = 5
K1 = 2 if \text{mod}(i,10) = 6
where i is slot index per frame; i = \{0, \dots, 19\}

K1 = 13 if \text{mod}(i,20) = 2
K1 = 12 if \text{mod}(i,20) = 3
K1 = 11 if \text{mod}(i,20) = 4
K1 = 10 if \text{mod}(i,20) = 5
K1 = 9 if \text{mod}(i,20) = 6
K1 = 8 if \text{mod}(i,20) = 7
K1 = 7 if \text{mod}(i,20) = 8
K1 = 6 if \text{mod}(i,20) = 9
K1 = 6 if \text{mod}(i,20) = 10
K1 = 6 if \text{mod}(i,20) = 11
K1 = 6 if \text{mod}(i,20) = 12
K1 = 6 if \text{mod}(i,20) = 13
where i is slot index per frame; i = \{0, \dots, 39\}

Notes

NOTE 1: D denotes a slot with all DL symbols; S denotes a slot with a mix of DL, UL and guard symbols; U denotes a slot with all UL symbols. The field is for information.

NOTE 2: D, G, U denote DL, guard and UL symbols, respectively. The field is for information.

NOTE 3: i is the slot index per frame.

NOTE 4: A -2ms or +3ms time offset to the NR configuration pattern relative to the E-UTRA UL-DL configuration must be applied in the TDD intra-band EN-DC.

OCNG

OCNG is used to fill the resources that are not occupied by the wanted reference channel. This is important in RF conformance testing because the UE should see a realistic loaded-cell condition, not only the useful PDSCH/PDCCH signals. The tables in this section define how the unused REs are filled for FDD and TDD cases.

 

< 38.521-1 v19.4.0 - Table A.5.1.1-1: OP.1 FDD: Generic OCNG FDD Pattern for all unused REs >

OCNG Distribution

Control Region
(Core Set)

Data Region

OCNG Parameters

 

 

Resources allocated

All unused REs (Note 1)

All unused REs (Note 2)

Structure

PDCCH

PDSCH

Content

Uncorrelated pseudo random QPSK modulated data

Uncorrelated pseudo random QPSK modulated data

Transmission scheme for multiple antennas ports transmission

1Tx port transmission

Spatial multiplexing using any precoding matrix with dimensions same as the precoding matrix for PDSCH

Subcarrier Spacing

Same as for RMC PDCCH in the active BWP

Same as for RMC PDSCH in the active BWP

Power Level

Same as for RMC PDCCH

Same as for RMC PDSCH

Notes

Note 1: All unused REs in the active CORESETs appointed by the search spaces in use.

Note 2: Unused available REs refer to REs in PRBs not allocated for any physical channels, CORESETs, synchronization signals or reference signals in channel bandwidth.

 

< 38.521-1 v19.4.0 - Table A.5.2.1-1: OP.1 TDD: Generic OCNG TDD Pattern for all unused REs >

OCNG Distribution

Control Region
(Core Set)

Data Region

OCNG Parameters

 

 

Resources allocated

All unused REs (Note 1)

All unused REs (Note 2)

Structure

PDCCH

PDSCH

Content

Uncorrelated pseudo random QPSK modulated data

Uncorrelated pseudo random QPSK modulated data

Transmission scheme for multiple antennas ports transmission

1Tx port transmission

Spatial multiplexing using any precoding matrix with dimensions same as the precoding matrix for PDSCH

Subcarrier Spacing

Same as for RMC PDCCH in the active BWP

Same as for RMC PDSCH in the active BWP

Power Level

Same as for RMC PDCCH

Same as for RMC PDSCH

Notes

Note 1: All unused REs in the active CORESETs appointed by the search spaces in use.

Note 2: Unused available REs refer to REs in PRBs not allocated for any physical channels, CORESETs, synchronization signals or reference signals in channel bandwidth.

 

Downlink Signal Level

This section summarizes the default downlink power and EPRE relationship among the physical channels. When an FRC is used for a test, these values are used as the starting point unless the individual test case overrides them. This is useful when you want to understand the relative power of SSS, PSS, PBCH, PDCCH, PDSCH, DMRS, CSI-RS, PTRS and OCNG.

 

< 38.521-1 v19.4.0 - Table C.0-1: Default Downlink power levels for NR >

SCS (kHz)

 

Unit

Channel bandwidth

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3 MHz

5 MHz

10 MHz

15 MHz

20 MHz

25 MHz

30 MHz

35 MHz

40 MHz

50 MHz

60 MHz

70 MHz

80 MHz

90 MHz

100 MHz

 

15

Number of RBs

 

15

25

52

79

106

133

160

188

216

270

N/A

N/A

N/A

N/A

N/A

 

 

Channel BW power

dBm

-62

-60

-57

-55

-54

-53

-52

-51

-51

-50

N/A

N/A

N/A

N/A

N/A

 

30

Number of RBs

 

N/A

11

24

38

51

65

78

92

106

133

162

189

217

245

273

 

 

Channel BW power

dBm

N/A

-61

-57

-55

-54

-53

-52

-51

-51

-50

-49

-48

-48

-47

-47

 

60

Number of RBs

 

N/A

N/A

11

18

24

31

38

44

51

65

79

93

107

121

135

 

 

Channel BW power

dBm

N/A

N/A

-58

-56

-54

-53

-52

-51

-51

-50

-49

-48

-48

-47

-47

 

 

RS EPRE

dBm/15kHz

-85

-85

-85

-85

-85

-85

-85

-85

-85

-85

-85

-85

-85

-85

-85

 

 

< 38.521-1 v19.4.0 - Table C.3.1-1: Downlink Physical Channels transmitted during a connection (FDD and TDD) >

Parameter

Unit

Value

SSS transmit power

W

Test specific

EPRE ratio of PSS to SSS

dB

0

EPRE ratio of PBCH to SSS

dB

0

EPRE ratio of PBCH to PBCH DMRS

dB

0

EPRE ratio of PDCCH to SSS

dB

0

EPRE ratio of PDCCH to PDCCH DMRS

dB

0

EPRE ratio of PDSCH to SSS

dB

0

EPRE ratio of PDSCH to PDSCH DMRS (Note 1)

dB

-3

EPRE ratio of CSI-RS to SSS

dB

0

EPRE ratio of PTRS to PDSCH

dB

Test specific

EPRE ratio of OCNG DMRS to SSS

dB

0

EPRE ratio of OCNG to OCNG DMRS (Note 1)

dB

0

Notes

Note 1: No boosting is applied to any of the channels except PDSCH DMRS. For PDSCH DMRS, 3 dB power boosting is applied assuming DMRS Type 1 configuration when DMRS and PDSCH are TDM'ed and only half of the DMRS REs are occupied.

Note 2: Number of DMRS CDM groups without data for PDSCH DMRS configuration for OCNG is set to 1.